Analog/mixed-signal IC Design Engineer - Acacia
Cisco SystemsJob Title
Analog/mixed-signal IC Design Engineer - Acacia
Role Summary
Member of Acacia's Mixed Signal Design team developing high-speed, high-accuracy analog/mixed-signal ICs for optical transceivers (100G–1.6T+). The role involves architecture, circuit design, layout, measurement and productization of ultra-deep sub-micron CMOS designs that integrate with digital/DSP, package and module teams.
This is a hybrid role based in the San Jose, CA office (three days per week on-site).
Experience Level
Senior-level. Typical candidates have extensive industry experience in high-speed analog/mixed-signal IC design and are expected to lead large blocks, mentor others, and deliver complex designs.
Responsibilities
Key responsibilities include design ownership from concept to production and cross-discipline collaboration.
- Architect, design, simulate, layout, and validate high-speed analog/mixed-signal blocks in advanced CMOS processes.
- Lead design efforts for large/complex blocks, track deliverables, participate in peer reviews, and establish design methodology.
- Collaborate with digital/DSP, system, package and module teams to meet system-level signal and power integrity requirements.
- Develop laboratory validation and test setups; analyze measurements and iterate designs toward production readiness.
- Mentor junior engineers and contribute to team process improvements.
Requirements
Must-have technical experience and skills. Preferred items listed separately.
- Proven experience in design, simulation and measurement of high-speed ICs covering at least three of these areas: high-speed serial links (SERDES, ADC/DAC), system link modeling, high-performance output drivers, phase-locked loops, clock distribution, opamps/programmable gain amplifiers, and equalization techniques.
- Experience designing for ultra-deep sub-micron CMOS and optimizing analog performance for integration with digital blocks.
- Experience with high-frequency layout practices including floorplanning and routing for mixed-signal chips.
- Ability to lead complex design efforts, mentor team members, and manage schedule-driven deliverables.
- Strong measurement and validation skills; ability to build test setups and interpret lab results.
Nice-to-have / preferred:
- Experience with electrical transceiver applications (backplane and cable communications) and transceiver-specific challenges.
- Experience with FinFET/GAA technologies and design-for-manufacturability analysis (PVT characterization, electromigration, self-heating, IR drop).
- Familiarity with ESD practices and laboratory validation methodologies.
- Proficiency with Cadence Virtuoso, Spectre/SpectreX/APS, Calibre, EMX, AMS mixed-signal simulation flows, and MATLAB.
Education Requirements
Minimum qualification specified as: Bachelor's degree plus 8 years of related experience, Master's degree plus 6 years, or PhD plus 3 years of related experience.
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).
