Analog Mixed Signal Design Engineer (Senior)

Job Title

Analog Mixed Signal Design Engineer (Senior)

Role Summary

Lead mixed-signal IP verification and analog design closure activities with a focus on static timing analysis across analog-digital interfaces. Work within a team of analog designers, digital architects, and verification engineers to execute simulations, debug testbenches, and improve verification methodology for next-generation mixed-signal systems.

This role is focused on hands-on execution of STA and mixed-signal verification, behavioral modeling, and automation to achieve timing and functional closure for complex analog-digital subsystems.

Experience Level

Senior. The posting specifies a minimum of 2+ years of industry experience; the role expects senior-level technical ownership of timing closure and verification flows.

Responsibilities

The core responsibilities are delivering timing closure and verification for mixed-signal designs and improving verification methodology.

• Lead static timing analysis (STA) for mixed-signal designs and develop timing constraints across analog-digital boundaries.
• Drive timing optimization and closure activities with cross-functional teams.
• Set up and run analog simulations, develop and debug testbenches, and optimize schematics using industry tools.
• Perform mixed-signal verification including analog simulations, behavioral modeling, and timing analysis; analyze results for power, performance, and reliability.
• Investigate and resolve complex pre-silicon issues; perform root-cause analysis and implement corrective actions.
• Develop behavioral models to improve simulation accuracy and efficiency; advance verification flows and automation (scripting/AI-assisted where applicable).
• Collaborate with analog designers, digital architects, RTL teams, and physical design engineers to ensure successful integration.

Requirements

Key must-have and nice-to-have competencies and technical skills.

• Must-have: 2+ years industry experience in mixed-signal verification and driving methodology changes.
• Must-have: 2+ years experience with scripting for automation (Python).
• Must-have: Demonstrated ability to debug analog testbenches and mixed-signal simulations; strong analytical and problem-solving skills.
• Nice-to-have: Experience with static timing analysis applied to mixed-signal systems, and with analog circuit design and simulation flows.
• Nice-to-have: Experience with Cadence ADE, SerDes or PLL mixed-signal systems, analog behavioral modeling (Verilog-A, SystemVerilog), and automation using scripting or AI techniques.
• Nice-to-have: Experience advancing verification methodologies and contributing to automation initiatives.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or another STEM field is required (or equivalent practical experience). A postgraduate degree in Electrical or Computer Engineering or a related STEM field is listed as preferred. The posting specifies degree + experience combination (Bachelor's with 2+ years industry experience) and notes postgraduate education as a plus.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.