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Analog/Mixed Signal ASIC Design Engineer

Qualcomm
September 08, 2026
Full-time
On-site
San Diego, California, United States
$142,400 - $213,600 USD yearly
ASIC Design Jobs, Level - Mid-Career

Job Title

Analog/Mixed Signal ASIC Design Engineer

Role Summary

Join Qualcomm's mixed-signal IP design team to develop high-speed, high-performance, low-power analog and mixed-signal IP (SerDes, DDR, PLL, DAC, ADC, sensors, etc.) for products in 5G, AI/ML, compute, and automotive markets. The team includes architects, ASIC designers, protocol experts, signal-processing and algorithm engineers.

The role focuses on schematic capture, circuit simulation, architecture definition, analog/digital partitioning, cross-functional integration, and silicon bring-up support.

Experience Level

Mid-level. Experience guidance varies by degree: examples in the posting reference multi-year ASIC or analog design experience (see Education Requirements for degree/experience combinations).

Responsibilities

Core responsibilities include schematic capture, circuit simulation, and collaboration across functional teams.

  • Perform schematic capture and simulations using Cadence Virtuoso and related tool flows.
  • Contribute to architecture definition and analog/digital design partitioning for mixed-signal IP.
  • Collaborate with layout, digital, and test teams to integrate and validate designs.
  • Support silicon bring-up, lab testing, and debugging activities.

Requirements

Key technical skills and experience required or strongly preferred. Degree requirements are summarized separately under Education Requirements.

  • Must-have: Demonstrated interest or experience in analog integrated-circuit design and familiarity with schematic capture and circuit simulation workflows.
  • Must-have: Hands-on experience with Cadence Virtuoso (schematic/simulation) and ASIC design tool flows.
  • Must-have: Experience using design and analysis tools such as SPICE, MATLAB and/or Verilog/VHDL.
  • Nice-to-have: Industry experience designing high-speed mixed-signal IP (CTLE, CDR, PLL, RXAFE, DAC, ADC, SerDes, DDR).
  • Nice-to-have: Familiarity with MATLAB and Python for modeling and analysis; understanding of design-for-yield and production issues for high-speed links.
  • Nice-to-have: Knowledge of signals and systems and sampled-domain signal processing.

Education Requirements

The posting references multiple acceptable academic backgrounds: Bachelor's, Master's, or PhD in Electrical Engineering or a related field. Examples from the listing include: Bachelor's degree plus 2+ years of analog/mixed-signal IC design experience (or 4+ years of ASIC-related experience), Master's degree in EE or related field (with examples showing 4+ years of ASIC-related experience), or PhD in EE or related field (with examples showing 2+ years of ASIC-related experience).


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-09-07