Analog Layout Staff Engineer

Job Title

Analog Layout Staff Engineer

Role Summary

Senior analog/mixed-signal layout engineer on Marvell's Central Engineering AMS team in Bangalore. Responsible for full-custom layout of high-speed SerDes and other analog IP across advanced FinFET and emerging nodes, ensuring performance and manufacturability through to tape-out.

Experience Level

Senior — routine expectation: 6–10 years of experience in high-speed analog/custom layout development.

Responsibilities

Primary responsibilities include translating schematics into manufacturable layouts, verifying physical correctness, and driving delivery across the full development cycle.

• Lead layout design for high-speed SerDes IPs and analog blocks (ADCs, PLLs, bandgaps, LDOs) in advanced process nodes.
• Perform floorplanning, full-custom layout, RC extraction, and signoff-ready physical verification.
• Resolve DRC, LVS, ERC, antenna issues and perform EMIR/IR-drop and electromigration fixes.
• Collaborate with circuit designers and cross-functional teams to meet performance, area, and manufacturability targets.
• Lead layout reviews, mentor junior engineers, and promote best practices for matching, shielding, clock routing, and power planning.
• Develop and maintain automation scripts to improve productivity and consistency.
• Own layout delivery from design handoff through tape-out and manufacturing interactions.

Requirements

Must-have technical skills and experience; nice-to-have items noted.

• 6–10 years of experience in high-speed analog/custom layout development.
• Strong understanding of semiconductor process technologies, device physics, and layout-dependent effects in advanced nodes.
• Proven experience with full-custom layout and signoff flow: RC extraction, DRC/LVS/ERC/DFM, and EMIR analysis.
• Hands-on experience in mixed-signal/analog/high-speed layouts (SerDes, ADC/DAC, PLL) in FinFET technologies.
• Proficiency with Cadence Virtuoso and industry-standard EDA tools.
• Ability to own full development cycle and communicate effectively with global teams.
• Nice-to-have: scripting for automation (Perl, Tcl, SKILL) and experience with emerging nodes (GAA).

Education Requirements

BE/B.Tech or MS/M.Tech in Electrical/Electronics Engineering, Microelectronics, or related fields. The posting specifies 6–10 years of relevant layout experience.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.