Analog Layout Intern

Job Title

Analog Layout Intern

Role Summary

Join the Central Engineering AMS layout team to support physical implementation of analog and mixed-signal integrated circuits. You will learn the analog layout flow and assist experienced engineers in creating layouts that meet performance, area, and reliability requirements.

This position may require eligibility for access to export-controlled technology and could be subject to an export license review.

Experience Level

Entry-level internship for current students; no prior professional layout experience required.

Responsibilities

Work under mentorship to translate schematics into manufacturable layouts and support verification and optimization tasks.

• Learn analog layout flow and differences from digital physical design.
• Create layouts for basic analog cells (comparators, OTAs) following matching, symmetry, shielding, and layout-dependent rules.
• Assist with floorplanning, placement, and routing of analog and mixed-signal blocks.
• Run physical verification (DRC, LVS, antenna) and help resolve issues with guidance.
• Work on parasitic awareness and EM/IR considerations with circuit designers to optimize layouts.
• Use industry tools such as Cadence Virtuoso and Calibre in a Linux environment.
• Document progress, meet regularly with paired circuit designers, and report status to the layout team.

Requirements

Must-have technical skills and attributes for successful performance.

• Basic understanding of semiconductor devices, CMOS technology, and electronic circuits.
• Analytical problem-solving skills and attention to detail.
• Self-motivated, eager to learn, and able to work effectively in a team.
• Good English communication skills.

Nice-to-have:

• Coursework or projects in analog circuits, VLSI, or IC design.
• Familiarity with Cadence Virtuoso, Calibre DRC/LVS, or similar tools.
• Basic Linux and scripting skills (Python, Tcl, or SKILL).

Education Requirements

Currently pursuing a Bachelor's degree in Electronics, Electrical, or Telecommunications Engineering, Mechatronics, Computer Engineering, or a related field; expected graduation 2027.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.