Analog Layout Intern, BS - Summer 2027

Job Title

Analog Layout Intern, BS - Summer 2027

Role Summary

Intern on a small analog layout team within Marvell's Central Engineering group providing silicon IP to multiple business units. Work collaboratively with global colleagues and contribute to real product tapeouts on advanced process nodes.

Experience Level

Entry-level internship for students currently pursuing an undergraduate degree (Bachelor's) with expected graduation between Fall 2027 and Summer 2028.

Responsibilities

Work on physical implementation and verification of analog IC designs under mentor guidance.

• Translate analog schematics into physical layout using Cadence Virtuoso and similar tools.
• Perform DRC, LVS, and other physical verification flows to ensure layout integrity.
• Collaborate with Analog IC Designers to debug and iterate layouts to meet specifications.
• Present progress in team meetings and cross-functional design reviews.
• Contribute to development of semiconductor IP targeting advanced process nodes (e.g., TSMC N2/N3).

Requirements

Core skills and eligibility expected for this internship.

• Must-have: Fundamental understanding of analog circuit theory and microelectronics.
• Must-have: Coursework or hands-on experience in analog design, IC layout, or VLSI design.
• Must-have: Familiarity with physical IC design tools (e.g., Cadence Virtuoso, Calibre, or similar EDA tools).
• Ability to run and interpret DRC/LVS reports and participate in physical verification flows.
• Effective communication and teamwork skills for cross-functional collaboration.
• Nice-to-have: Prior internship or project experience with layout tapeouts and advanced process nodes.
• Applicants must be eligible to access export-controlled technology; non-U.S. citizens may be subject to export license review.
• For reasonable accommodation during the selection process, contact Marvell HR Helpdesk at TAOps@marvell.com.

Education Requirements

Currently pursuing a Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field with expected graduation between Fall 2027 and Summer 2028. (Position targets BS-level interns.)

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.