Analog Design Senior Manager, SerDes

Job Title

Analog Design Senior Manager, SerDes

Role Summary

Lead an analog design team developing multi-Gbps NRZ and PAM4 SerDes IP through standards analysis, circuit architecture, silicon implementation, and bring-up. The role combines hands-on transistor-level design review with people management, cross-functional coordination, and schedule delivery for advanced-process IP.

Experience Level

Senior - requires extensive experience. The posting specifies 14+ years of hands-on analog design experience and 1–2 years in a management or supervisory role.

Responsibilities

Manage technical delivery and team development for SerDes IP projects; remain technically hands-on for critical issues.

• Lead a team developing multi-Gbps NRZ and PAM4 SerDes IP from specification through silicon bring-up.
• Conduct technical design reviews for SerDes sub-circuits (equalizers, samplers, drivers, serializers/deserializers, VCOs, phase mixers, DLLs/PLLs, bandgaps, ADCs/DACs).
• Convert standards and system requirements into block-level specifications and architectures.
• Review simulation, characterization, and post-silicon debug data; recommend design updates and corrective actions.
• Create and maintain project schedules and action plans across multiple process nodes.
• Hire, mentor, and develop team members through coaching, reviews, and career conversations.
• Work cross-functionally with digital designers, verification, layout, and CAD to resolve mixed-signal integration and timing issues.

Requirements

Key qualifications and technical requirements.

• Must-have: 14+ years of hands-on analog design experience focused on high-speed SerDes applications.
• Must-have: 1–2 years in a management or supervisory role leading analog design teams.
• Must-have: Deep transistor-level circuit design expertise and strong CMOS fundamentals across SerDes sub-circuits (receive equalizers, samplers, drivers, serializers/deserializers, VCOs, phase mixers, DLLs/PLLs, bandgaps, ADCs, DACs).
• Must-have: Proven ability to design IP for high-speed connectivity standards such as PCIe and Ethernet.
• Must-have: Solid understanding of mixed-signal challenges: analog-digital interface timing, ESD techniques and layout, custom digital for high-speed logic, and layout effects (matching, reliability, proximity).
• Must-have: Experience with design-for-reliability: electromigration, IR drop, and aging effects.
• Nice-to-have: Hands-on experience with silicon bring-up, post-silicon debug, and characterizing electrical measurements for SerDes IP.

Education Requirements

Bachelor's or Master's degree in Electronics Engineering or a related field.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.