Analog Design Principal Engineer

Job Title

Analog Design Principal Engineer

Role Summary

Senior analog/mixed-signal engineer responsible for architecting and delivering Multi-Gbps SERDES IP for data center, automotive, and AI accelerator applications. Work spans architecture, circuit design, analog/digital co-design, layout collaboration, and post-silicon debug in advanced FinFET and GAA process nodes.

Experience Level

Senior-level. Typical experience expectation: MTech/MS with 8+ years or BTech/BS with 10+ years of hands-on analog IC design experience.

Responsibilities

Design, validate, and document high-speed transceiver IP; collaborate across layout, digital, verification, and customer teams; and lead post-silicon analysis and product improvements.

• Translate SerDes standards (PCIe, Ethernet, USB, CXL) into transceiver architectures and detailed sub-block specifications for NRZ and PAM4 designs.
• Architect and design analog/mixed-signal blocks: TX drivers, RX front-ends, adaptive equalizers, PLLs/DLLs, bandgaps, regulators, oscillators, ADC/DAC blocks.
• Collaborate with digital teams on co-design, calibration loops, adaptation algorithms, and timing handoff to ensure integration and performance.
• Work with layout engineers to minimize parasitics, manage device stress and variation, and ensure robust post-silicon performance.
• Present simulation results, trade-offs, and architectural decisions in internal reviews and customer meetings.
• Document design features, simulation methodology, test plans, and characterization; support post-silicon bring-up, debug, and iteration.
• Analyze customer silicon and field data to drive design updates and improvements for next-generation IP.

Requirements

Technical must-haves and relevant skills for successful performance in this role.

• Proven CMOS tape-outs in FinFET technologies and hands-on experience with Multi-Gbps high-speed designs using NRZ and PAM4 modulation.
• Deep expertise in SERDES sub-circuits: TX drivers, RX front-ends, adaptive equalizers, PLLs/DLLs, bandgap references, regulators, oscillators, and data converters.
• Strong understanding of analog/digital co-design, calibration/adaptation algorithms, and timing handoff between analog and digital domains.
• Proficiency with SPICE simulators (Spectre, HSPICE, or similar), schematic entry, and collaboration with physical layout teams.
• Experience with scripting tools (TCL, Perl, MATLAB) for post-processing simulation data and automating design tasks.
• Solid system-level budgeting for jitter, amplitude, and noise; familiarity with signal integrity issues including packaging parasitics, crosstalk, and channel loss.

Nice-to-have:

• Experience with ESD protection, custom digital design, and design-for-reliability (electromigration, IR drop, aging, self-heating).
• Prior work on high-speed interleaved SAR ADCs.

Education Requirements

MTech/MS with 8+ years or BTech/BS with 10+ years of hands-on analog IC design experience in Electrical Engineering, Computer Engineering, or a related technical field.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.