Analog Design Intern
Marvell TechnologyJob Title
Analog Design Intern
Role Summary
Member of Marvell's Central Engineering analog IC team responsible for designing and verifying transistor-level analog circuits used across Marvell product lines. The role covers schematic design, simulation, and collaboration with layout and senior designers to deliver production-ready IP.
Experience Level
Entry-level (Internship). No years of professional experience specified.
Responsibilities
Primary duties include:
- Design and simulate transistor-level analog circuits using Cadence and other CAD tools.
- Create, improve, or port circuit blocks; iterate between schematic, simulation, layout, and verification.
- Analyze circuit performance, run simulations and tests, and tune designs to meet specifications.
- Collaborate with layout engineers, senior designers, and cross-functional teams; participate in design reviews and weekly project meetings.
- Support designs through tapeout and integration into production flows.
Requirements
Hard requirements and eligibility:
- Approved intern for the 2027 calendar year.
- Ability to work onsite in Santa Clara, CA.
- Eligibility to access export-controlled technology; non-U.S. applicants may be subject to export license review prior to employment.
- Familiarity with transistor-level analog design and Cadence is expected/preferred.
Education Requirements
The posting notes additional compensation may be available for PhD intern candidates. No other specific degrees, fields of study, certifications, or equivalent-experience language were specified.
About the Company
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.
