Analog Design Flow and Infrastructure Design Automation Manager
Intel CorporationJob Title
Analog Design Flow and Infrastructure Design Automation Manager
Role Summary
Lead development, deployment, and governance of analog/mixed-signal design environments and CAD infrastructure to ensure reproducible, auditable tapeout-ready flows across silicon programs.
Own EDA tool ecosystems, PDK integration, compute and storage infrastructure, design-data governance, and tapeout manifest management while leading a team of DA/infrastructure engineers and collaborating with design, IT, and EDA vendors.
Experience Level
Senior β typically requires 10+ years in analog/mixed-signal design or CAD support and 5+ years of leadership experience.
Responsibilities
Primary responsibilities include maintaining design flows and infrastructure, ensuring reproducibility and tapeout readiness, and leading cross-functional teams.
- Own analog/mixed-signal design flows (schematic, layout, LVS/DRC, extraction) and simulation environments (HSPICE, corner analysis); drive automation and methodology improvements.
- Manage Linux-based DA infrastructure: compute farms, storage, license servers (FlexLM), job schedulers (LSF/grid), monitoring, scalability, and high availability.
- Partner with IT on hardware lifecycle, cloud integration, and disaster recovery; maintain secure, access-controlled environments for IP protection.
- Define and govern tapeout manifests (PDK versions, tool versions, signoff configs, extraction/verification decks) and maintain environment snapshots for reproducibility.
- Implement version control and configuration strategies for CAD scripts, methodology flows, PDK overlays, and verification decks (Git, Cliosoft, SVN, Perforce).
- Develop automation for environment capture, traceability, reproducible simulations, and reporting metrics for DA service KPIs.
- Lead, mentor, and grow DA and infrastructure engineers; drive tool evaluations, vendor interactions, and internal training/documentation.
Requirements
Must-have technical skills and experience; preferred items listed separately.
- 10+ years in analog/mixed-signal design support or CAD operations and 5+ years in a leadership role.
- Hands-on experience with analog design platforms such as Cadence Virtuoso, p-cell development, and Custom Compiler.
- Deep knowledge of analog layout, verification flows, PDK integration, and tapeout processes.
- Proven experience in design data governance, manifest/tapeout release control, and environment reproducibility.
- Strong Linux system administration and scripting skills (Python, Tcl, Shell, SKILL).
- Experience with compute grid management, storage architectures for EDA, and license management systems.
- Expertise with version control and configuration management tools (Git, Cliosoft, SVN, Perforce).
Education Requirements
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field (as stated in the source).
Preferred Qualifications
Nice-to-have items that strengthen candidacy.
- Experience with advanced process nodes (FinFET, GAA).
- Familiarity with CI/CD practices applied to EDA environments and infrastructure-as-code principles.
- Experience supporting geographically distributed design teams and cloud-integrated workflows.
About the Company
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
