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Analog Design Architect

Synopsys
October 23, 2026
Full-time
On-site
Mississauga, Ontario, Canada
$170,000 - $255,000 CAD yearly
Device Engineering Jobs, Level - Senior

Job Title

Analog Design Architect

Role Summary

Lead the architecture, design and delivery of analog macro-level circuits for SerDes IP, focusing on TX, RX and clocking paths. Work across analog, digital, layout and verification teams to produce silicon-proven IP.

The role provides technical leadership and mentorship, improves analog design and verification methodologies, and supports customer-facing technical reviews.

Experience Level

Senior - see Education Requirements for the explicit years-of-experience guidance.

Responsibilities

Primary responsibilities include:

  • Define analog macro architecture and translate SerDes standards into detailed analog specifications.
  • Design and implement transistor-level circuits for TX, RX and clock paths and associated sub-blocks.
  • Track and review technical progress of sub-block owners to ensure project alignment and delivery.
  • Develop and execute design and verification strategies; perform detailed SPICE-based analysis.
  • Collaborate with digital RTL engineers on calibration, adaptation and control algorithms for analog circuits.
  • Oversee physical layout considerations to minimize parasitics, device stress and process variation impacts.
  • Present simulation data and technical insights in peer and customer reviews; document designs and test plans.
  • Mentor and review junior engineers; provide technical leadership in design and customer engagements.

Requirements

Must-have technical skills and experience:

  • Extensive SerDes / high-speed analog design experience with silicon-proven implementations for TX, RX and clock paths.
  • Strong transistor-level CMOS design fundamentals and experience with equalizers, samplers, drivers, serializers/deserializers, VCOs, phase interpolators, DLLs, PLLs, bandgap references, ADCs and DACs.
  • Advanced FinFET CMOS layout skills to minimize parasitics and local device mismatch.
  • Experience with EDA tools for schematic entry, physical layout and design verification; proficiency with SPICE simulators.
  • Familiarity with analog behavioral modeling and Verilog-A for simulation control.
  • Programming skills for automation and analysis: TCL, Perl, C, Python and MATLAB.
  • Awareness of ESD and reliability issues and corresponding circuit/layout mitigation techniques.
  • Proven leadership and mentoring experience; ability to coordinate small teams and drive macro-level design projects to completion.

Education Requirements

PhD with 10+ years, or MSc with 12+ years of SerDes / high-speed analog design experience. The posting did not specify particular fields of study or certifications.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-10-19