Analog Circuit Design Engineer

Job Title

Analog Circuit Design Engineer

Role Summary

The Analog Circuit Design Engineer will design, simulate, verify, and validate high-performance analog and mixed-signal circuits for advanced process nodes, with a focus on high-speed SerDes PHYs (112/224Gbps). The role works within a cross-functional engineering team supporting architecture, layout, and validation to meet power, performance, area, timing, and yield targets.

This is a practical engineering role emphasizing circuit implementation, simulation, post-layout verification, and production readiness for high-speed I/O IP.

Experience Level

Senior. Experience guidance provided by the employer: typically a minimum of ~6 years with a Bachelor's degree or ~4 years with a Master's degree (per employer qualifications).

Responsibilities

Primary responsibilities focus on analog/mixed-signal circuit design for high-speed interfaces and production readiness.

• Design and implement analog circuits for TX, RX and PHY clocking targeting 112/224Gbps SerDes.
• Perform circuit-level design, parameter extraction, and analog behavior modeling to meet microarchitecture specifications.
• Create and execute test plans for functional, reliability, and performance validation; support post-silicon testing and debug.
• Optimize designs for power, performance, area, timing, leakage, and manufacturability (yield).
• Collaborate with architecture, layout, and verification teams to ensure robust electrical and physical implementation.
• Use industry-standard EDA tools for schematic/layout, SPICE simulation, extraction, and post-layout verification.
• Improve design methodologies and participate in technical reviews and cross-functional problem resolution.

Requirements

Must-have technical skills and tools for the role; preferred items listed under "Nice-to-have."

• Proven experience designing analog/mixed-signal circuits for high-speed SerDes PHYs (112/224Gbps).
• Proficiency with Cadence Virtuoso, SPICE simulators, and post-layout verification/extraction flows (DRC, LVS, parasitic extraction).
• Strong understanding of CMOS technologies and I/O fundamentals.
• Experience with circuit simulation methodologies and model-based design/verification.
• Skill in optimizing circuits for PPA (power, performance, area) and yield trade-offs.
• Ability to work with cross-functional teams and drive technical discussions to resolve performance and design issues.

Nice-to-have:

• Post-silicon validation and debug experience.
• Scripting experience for design automation (Python, Perl, Tcl).
• Familiarity with industry standards and compliance for high-speed I/O.

Education Requirements

Requires a Bachelor’s or Master’s degree in Electrical Engineering or a closely related field. Employer guidance specifies minimum experience of approximately 6 years with a Bachelor’s degree or 4 years with a Master’s degree. (No certification requirements were specified.)

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.