Advanced Packaging Design Engineer

Job Title

Advanced Packaging Design Engineer

Role Summary

The Advanced Packaging Design Engineer will lead package and system co-design for Marvell's Photonic Fabric Systems Packaging team, driving substrate and multi-chip SiP solutions from feasibility through qualification.

The role collaborates with ASIC/PIC designers, system teams, substrate vendors and OSATs to deliver high-density, high-performance packaging solutions that meet signal/power integrity, thermal, mechanical and manufacturability requirements.

Experience Level

Mid-level. The posting requests approximately 5–10 years of relevant semiconductor advanced packaging design experience.

Responsibilities

Primary responsibilities include package design, cross-functional coordination, and qualification activities.

• Lead Si/package/PCB/system co-design, coordinating with ASIC/PIC designers and downstream system teams.
• Scope substrate design feasibility for multi-chip SiP packages.
• Lead package layout and routing decisions considering I/O, SI/PI, thermal, mechanical, reliability, manufacturability, bumping, and material selection.
• Ensure designs meet high-speed interface specifications (HBM, DDR, PCIe, SerDes).
• Manage netlists for heterogeneous chiplet assemblies using modern EDA tools.
• Support production and assembly interactions with substrate suppliers and OSATs.
• Participate in package and board-level qualification, defining test vehicles and failure-mode analysis for thermo-mechanical reliability.
• Drive specification development and vendor collaboration to advance productization of advanced package solutions.

Requirements

Must-have technical skills and experience; listed concisely below.

• 5–10 years of experience in semiconductor advanced packaging design.
• Extensive experience with advanced packaging design tools such as Cadence APD.
• Proven experience with high-density/high-performance interconnects and 2.5D/3D packaging technologies (InFO, CoWoS, FoCoS, EMIB).
• Deep knowledge of cross-functional packaging areas: Si floor planning, package and board layout, design rules, BOM, materials/processes, thermal, mechanical, SI/PI, DFM, assembly, reliability, and cost tradeoffs.
• Familiarity with MCAD tools (e.g., AutoCAD) and high-speed signaling best practices for signal and power integrity.
• Proven record working with substrate vendors and OSATs to meet DFM, yield, assembly, and reliability requirements.
• Strong analytical, problem-solving, cross-functional collaboration, project management, and technical presentation skills.
• Photonics packaging experience is a plus.
• May require eligibility to access export-controlled technology; candidates could be subject to export license review.

Education Requirements

BS, MS or PhD in Electrical Engineering, ECE, Materials Science/Engineering, Mechanical Engineering, Chemical Engineering, or related technical field (BS/MS/PhD explicitly listed in posting).

Equal Employment & Accessibility

All qualified applicants will receive consideration without regard to protected characteristics. Applicants who require a reasonable accommodation during the selection process may contact Marvell HR Helpdesk at TAOps@marvell.com.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.