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Advanced Package Architect Sr. Staff Engineer

Marvell Technology
October 23, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Other Semiconductor Jobs, Level - Senior

Job Title

Advanced Package Architect Sr. Staff Engineer

Role Summary

Senior engineer in Marvell's central advanced packaging organization responsible for end-to-end development of high-speed IC packages. Lead package architecture, ball-map and netlist definition, and package requirement documents to meet SI/PI, manufacturability, reliability, and cost targets.

Work cross-functionally with package architects, chip and board design, electrical simulation, and manufacturing to move designs from concept through tapeout.

Experience Level

Senior - 8+ years of related professional experience.

Responsibilities

Core responsibilities include:

  • Drive microelectronic package development from concept through tapeout.
  • Create C4 and BGA ball maps optimized for SI/PI and layout efficiency.
  • Plan and validate netlist mappings across dies, interposers, and substrates.
  • Define die placement, padstacks, net assignments, and package-level connectivity.
  • Author and maintain Package Requirement Documents (PRDs) with die arrangements, stackups, and design constraints.
  • Collaborate with chip, board, and electrical-simulation teams for package/system co-design.
  • Contribute to tool, process, and flow development, including library maintenance and scripting for automation.
  • Ensure manufacturability, reliability, cost compliance, and adherence to foundry and substrate constraints.

Requirements

Must-have technical skills and experience:

  • 8+ years in package development for high-pin-count, complex packages.
  • Experience developing netlists and schematics for large package designs.
  • Experience creating C4 and BGA ball maps for high-pin-count designs.
  • Proficiency with Cadence OrbitIO or Integrity System Planner (ISP) or equivalent tools.
  • Strong package-design fundamentals: design rules, breakout, place-and-route, shielding, reference planes, power distribution, and pinout optimization.
  • Solid understanding of SI/PI fundamentals at substrate, board, and system levels; able to interpret signal and power simulation results.
  • Familiarity with foundry design rules and substrate manufacturing constraints.
  • Strong communication skills and experience working across global cross-functional teams.

Nice-to-have:

  • Knowledge of 2D/2.5D and advanced packaging architectures (CoWoS, EMIB, CPO, CPC).
  • Understanding of thermal and mechanical package constraints (warpage, TIM).
  • Experience with scripting for automation and process/flow improvements.

Note: Role may require eligibility to access export-controlled technology and may be subject to export license review.

Education Requirements

Not specified.


About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

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Date Posted: 2026-10-21