Virtual Platforms & SoC Modeling Engineer

Role Summary

The Virtual Platforms & SoC Modeling Engineer will work at Meta, focusing on creating silicon models vital for architectural exploration of custom silicon solutions. The role requires collaboration with cross-disciplinary teams to design high-fidelity models that assist in both software and hardware co-design before silicon integration.

Experience Level

The position calls for candidates with a minimum of 6 years of relevant experience in SoC modeling, hardware simulation, or performance modeling of complex silicon architectures.

Responsibilities

Key responsibilities include:

• Designing and developing high-level models of complex SoC hardware using SystemC TLM and other frameworks.
• Collaborating with architects and engineers to develop high-fidelity models for various IPs.
• Interfacing with architecture teams to facilitate software and hardware integration on pre-silicon platforms.
• Coordinating virtual platforms with hardware programs, validating SoCs and architectural changes.

Requirements

Applicants should meet the following criteria:

Education Requirements

A Bachelor's degree in Computer Science, Computer Engineering, or a related field is required.

Additionally, candidates should have:

• 6+ years in hardware modeling or simulation.
• Proficiency in modern C++ and/or C programming.
• Understanding of SoC components.
• Experience with SystemC, TLM, or simulation frameworks.

Preferred Qualifications

Preferred qualifications include:

• Expertise in chip-design related domains.
• Familiarity with various SoC elements like ARM, DSPs, and memory systems.
• Experience with build frameworks and continuous integration tools.
• Proficiency in tools for debugging and virtual platform development.
• Knowledge of performance metrics for pre-silicon testing.
• Python scripting skills for automation.