Role Summary
Lattice is seeking candidates for the position of Staff Software Development Engineer in FPGA place and route. This is a full-time position located in Pune, India. The successful candidate will be part of a dynamic team responsible for designing and developing Lattice FPGA software tools, focusing on place and route engine development.
Experience Level
10+ years of experience in EDA tool (preferably, place and route) development.
Responsibilities
- Responsible for developing advanced security flows, like Isolation Design Flow of FPGA design.
- Responsible for place and route engine quality improvement.
- Responsible for place and route feature and capability development.
- Responsible for Lattice new FPGA product support.
- Create unit tests to validate implementation and ensure high quality.
Requirements
- BS/MS/PhD in Electrical Engineering or Computer Science or Computer Engineering.
- Proficient with C/C++, data structure, graph algorithms, logic design, and shell scripts.
- Strong background and experience in data structures and algorithms.
- Experience of place and route engine development in either FPGA or ASIC domain is a must.
- Experience of FPGA place and route engine development is ideal.
- Strong written and verbal communication skills, and collaboration skills.
- Experience of multi-processing development is a plus.
- Solid understanding of FPGA architectures is a plus.
Education Requirements
BS/MS/PhD in Electrical Engineering or Computer Science or Computer Engineering.