Role Summary
Lattice Semiconductor is seeking a Staff SoC RTL Design Engineer to join the HW design team focused on IP design and full chip integration, located in Pune, India. This position is an individual contributor role emphasizing FPGA projects and offers a dynamic environment for innovation and growth.
Responsibilities
- Contribute significantly to FPGA design efforts and drive logic design for key FPGA blocks and full chips.
- Implement best-in-class methodologies to enhance design time and quality.
- Ensure design quality with assertions, checkers, and scripting.
- Build strong relationships with global teams and mentor colleagues.
- Occasional travel may be required.
Requirements
- 8+ years of experience in logic design across multiple silicon projects.
- Expertise in SoC integration and defining micro-architecture.
- Experience with ARM processors, AXI, AMBA bus, ENET, PCIE, and related protocols is a plus.
- Familiarity with FPGA design considerations and use-cases is advantageous.
- Strong independent working ability and problem-solving skills.
- Proven capability to collaborate with teams across various locations.
Education Requirements
BS/MS/PhD in Electronics Engineering, Electrical Engineering, Computer Science, or equivalent.