Staff SoC Engineer - Physical Design

Role Summary

This position requires a passionate Physical Design Engineer with extensive experience in RTL2GDSII flows, particularly with advanced technology nodes. You will be responsible for driving complex designs independently and delivering high-performance silicon solutions.

Experience Level

For this role, a minimum of 5 years of hands-on experience in physical design, particularly in advanced technology nodes such as 7nm, 5nm, or 3nm, is essential along with comprehensive experience with industry-leading EDA tools.

Responsibilities

• Lead full RTL2GDSII physical design implementation for advanced process nodes, ensuring successful tape-outs.
• Execute critical design processes including synthesis, place & route, and static timing analysis.
• Conduct block-level and full-chip floor-planning, EMIR analysis, and timing closure activities.
• Collaborate with global teams to tackle complex design challenges while ensuring adherence to quality and schedules.
• Utilize and optimize Synopsys tools to enhance silicon design results.
• Develop automation scripts to streamline workflows and improve design efficiency.
• Mentor junior engineers and contribute insights for continuous design improvement.

Requirements

Candidates should possess a Bachelor’s or Master’s degree in Electronics, Electrical Engineering, or a related field, along with hands-on experience in physical design and EDA tools. Strong skills in scripting languages such as Python, PERL, or TCL are also required.

Education Requirements

Bachelor’s or Master’s degree (BE/BTech/MTech or equivalent) in Electronics, Electrical Engineering, or a related field is required.