Staff Package Layout Engineer

Role Overview

We are seeking a Staff Package Layout Engineer to join our System-in-Package team. The engineer will work on the design and implementation of ARM’s next generation of System-on-Chip (SoC) for various applications in IoT, automotive, and computing domains. The role involves collaborating with various teams across multiple locations including the US, UK, and France, focusing on advanced design techniques in packaging.

Experience Level

This position is for an individual with 4+ years of professional experience in the field of electrical engineering, specifically related to package layout design and verification.

Key Responsibilities

• Design and verify packaging layouts while applying best practices for Design for Manufacturability (DFM), Design for Assembly (DFA), and signal and power delivery networks.
• Work independently, showing initiative and enthusiasm in addressing design challenges.
• Contribute ideas that enhance team performance and workflow.
• Coordinate and communicate effectively with external vendors as necessary.

Essential Qualifications

• Bachelor's degree in Electrical Engineering or a related field.
• Proficiency with 2.5D and 3D package systems, alongside knowledge of their signal integrity/power integrity (SI/PI) requirements.
• Extensive experience with Cadence APD & Allegro toolsets.
• A strategic outlook to drive standardization and improvement in design processes.

Desirable Skills

• Experience working with EDA vendors and tool evaluations.
• Strong communication and presentation skills.
• Familiarity with programming in Python, SKILL, or TCL.

Education Requirements

Applicants must possess a degree in Electrical Engineering or a related discipline.