Staff Memory Layout Engineer

Role Overview

The Staff Memory Layout Engineer at Synopsys is tasked with creating and maintaining memory layout designs that support cutting-edge technology initiatives. The role is centered on enhancing the efficiency and effectiveness of memory layouts in various hardware projects within a fast-paced engineering environment.

Experience Level

This position is considered to be at a senior professional level and is suited for individuals who have a solid background in engineering and memory layout design.

Key Responsibilities

The primary responsibilities of this role include:

• Design and develop memory layouts for advanced semiconductor technology.
• Collaborate with cross-functional teams to optimize layout designs for performance and manufacturability.
• Conduct thorough evaluations and validation of memory layout performances.
• Maintain documentation and project files to support engineering efforts.
• Mentor junior engineers and provide input on best practices in layout design.

Essential Requirements

Candidates looking to apply for the Staff Memory Layout Engineer role should have the following qualifications:

• Strong background in electrical engineering or related fields.
• Proficiency in memory layout design tools and methodologies.
• Familiarity with semiconductor manufacturing processes.
• Effective communication skills and teamwork capabilities.
• At least 5 years of experience in a related role.

Education Requirements

A Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related discipline is required for this position.