Staff IP Design Engineer

Role Summary

The Staff IP Design Engineer will work in Penang to enhance technical capabilities for IP deliverables, leading research, design, and development of FPGA primitives, Foundation IP, and FPGA EDA design workflows.

Experience Level

Level - Senior

Responsibilities

• Design and develop Lattice Foundation IP.
• Lead FPGA primitives and IP development.
• Collaborate with cross-functional teams for product release cycles.
• Execute requirement analysis, feature scoping, development, testing, and validation processes.

Requirements

• Bachelor's or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or related fields.
• 8+ years of experience in FPGA IP and/or EDA tools development.
• Strong communication skills and knowledge of FPGA architecture.
• Hands-on experience in FPGA RTL design and verification.

Education Requirements

Bachelor's or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or related fields.