Staff Engineer - SerDes Timing Analysis

Role Summary

The Staff Engineer will focus on SerDes Timing Analysis within the Analog Design team. The role encompasses designing and analyzing high-performance SerDes circuits, ensuring they meet stringent industry standards.

Experience Level

This position is intended for candidates who possess advanced knowledge in analog design and have a proven track record within the semiconductor industry.

Responsibilities

• Conduct timing analysis for high-speed SerDes circuits.
• Collaborate with design teams to optimize performance metrics.
• Utilize design tools and methodologies to ensure efficient development cycles.
• Document all analysis and findings for internal records.

Requirements

Applicants must have a strong background in analog circuit design, specifically with SerDes systems. Proficiency in simulation tools, such as Cadence or similar, and a comprehensive understanding of timing analysis are essential.

Education Requirements

A bachelor's degree in Electrical Engineering or a related field is required. A master's degree is preferred for higher-level positions.