Staff Engineer - RTL Design

Job Title

Staff Engineer - RTL Design

Role Summary

Senior RTL design engineer responsible for RTL development, subsystem and SoC integration, and verification sign‑off within a SoC design team. Works across architecture, RTL implementation, integration, and synthesis phases to deliver high‑quality microcontroller/SoC components.

The role is part of the SoC/RTL engineering organization based in Noida and focuses on delivering production‑ready RTL, integration reviews, and cross‑team engineering sign‑offs.

Experience Level

Senior level — typically 8–12 years of relevant experience in high‑performance digital logic design and SoC integration.

Responsibilities

Key responsibilities include RTL implementation, integration, verification sign‑off, and engineering reviews to ensure correct SoC behavior and quality.

• Design and implement high‑performance digital RTL for subsystems and SoC components.
• Integrate IP and subsystems into SoC-level RTL and perform integration sign‑offs.
• Execute LINT, CDC, and RDC sign‑offs to meet design quality requirements.
• Drive the SoC design flow from high‑level design through synthesis and implementation.
• Conduct IP integration reviews and back‑end (BE) report reviews to support concurrent engineering.
• Debug RTL using industry tools and collaborate with verification and physical design teams to close issues.
• Provide technical leadership, mentor junior engineers, and communicate status and risks to stakeholders.

Requirements

Must-have technical skills and experience; nice-to-have items noted separately.

• 8–12 years experience in digital logic design and SoC RTL integration using ARM cores, bus protocols, and interconnects.
• Proven experience building subsystems and integrating RTL into SoC environments.
• Hands‑on with LINT, CDC, and RDC sign‑off processes and tools.
• Practical experience across the SoC design flow, including synthesis.
• Experience with simulators and EDA tools such as Synopsys VCS or Cadence RTL simulator, Synopsys Design Compiler / RTL Compiler / Genus, and Verdi for debug.
• Strong problem‑solving skills, logic analysis, and the ability to decompose complex problems.
• Excellent written and verbal communication; self‑motivated and able to drive issues to closure.
• Nice-to-have: Experience with ISO 26262 functional safety relevant microcontroller architectures.

Education Requirements

Master's or Bachelor's degree in Electrical or Electronic Engineering (or equivalent technical degree). ISO 26262 experience or familiarity is listed as preferred. Equivalent practical experience may be acceptable.

About the Company

Company: NXP Semiconductors

Headquarters: Nijmegen, Netherlands

NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.