Staff Engineer, Physical Design
RenesasJob Title
Staff Engineer, Physical Design
Role Summary
The Staff Engineer in Physical Design will lead the closure efforts for MCU/subsystem/block-level designs with an emphasis on timing closure, congestion resolution, power integrity, and physical implementation. This role involves collaboration with SoC-level teams to develop effective clocking and floor planning strategies.
Experience Level
Senior - 7+ years of experience in physical design, particularly focusing on complex hierarchical SoCs at advanced nodes (7nm, 5nm, or below).
Responsibilities
The key responsibilities include:
- Leading closure efforts for MCU/subsystem/block-level designs.
- Aligning with SoC-level teams on clocking and floor planning strategies.
- Implementing UPF for power domains.
- Ensuring subsystem clock domain integration aligns with SoC clock architecture.
- Developing and refining subsystem closure methodologies.
- Mentoring physical design engineers within subsystem teams.
- Collaborating with multiple teams to ensure seamless integration and closure.
- Identifying and mitigating physical design risks.
Requirements
Candidates must meet the following qualifications:
- M.Tech/B.Tech in Electrical Engineering.
- Strong expertise in timing closure and physical implementation.
- Hands-on experience with tools like Synopsys ICC2, Cadence Innovus, and PrimeTime.
- Proficiency in scripting (Tcl, Python, Perl) for automation.
- Knowledge of low-power design techniques.
Education Requirements
Required education is a M.Tech or B.Tech in Electrical Engineering.
About the Company
Company: Renesas
Headquarters: Hitachinaka, Japan
Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.
