The Staff Engineer position involves overseeing the design, development, and verification of NVM controllers at advanced technology nodes. The role requires mentoring junior engineers and working in a collaborative environment to enhance digital designs and integration processes.
This position is aimed at candidates with substantial experience in digital ASIC design, specifically those with over 8 years of hands-on experience and 3 years of leadership or mentorship roles.
Candidates must possess extensive knowledge of digital ASIC design, including expertise in Verilog and synthesis methodologies. Experience with Synopsys tools is preferred, along with a strong understanding of NVM architectures.
A Bachelor’s degree in Electrical Engineering or a related field is required.