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Staff Engineer - Digital ASIC Design

Synopsys
Full-time
On-site
Seattle, WA
$131,000 - $196,000 USD yearly
Level - Senior

Role Summary

The Staff Engineer position involves overseeing the design, development, and verification of NVM controllers at advanced technology nodes. The role requires mentoring junior engineers and working in a collaborative environment to enhance digital designs and integration processes.

Experience Level

This position is aimed at candidates with substantial experience in digital ASIC design, specifically those with over 8 years of hands-on experience and 3 years of leadership or mentorship roles.

Responsibilities

  • Lead design and verification efforts for NVM controllers targeting OTP and MTP products.
  • Manage the architecture definition and implementation processes, ensuring innovative digital solutions.
  • Participate in all ASIC design phases including RTL coding and synthesis.
  • Provide technical support during product integration and collaborate with cross-functional teams.
  • Oversee and optimize digital control blocks and enhance design methodologies.
  • Drive continuous improvement initiatives in digital design practices.

Requirements

Candidates must possess extensive knowledge of digital ASIC design, including expertise in Verilog and synthesis methodologies. Experience with Synopsys tools is preferred, along with a strong understanding of NVM architectures.

Education Requirements

A Bachelor’s degree in Electrical Engineering or a related field is required.