Role Overview
This position requires a skilled Hardware Emulation Engineer to spearhead the deployment and debugging of intricate SoC designs using hardware emulation platforms.
Experience Level
Applicants should have between 4 to 8 years of relevant industry experience, specifically in ASIC/SoC verification or emulation.
Key Responsibilities
In this role, you will:
- Oversee the compilation, partitioning, and mapping of advanced SoC and subsystem RTL designs.
- Create and maintain automated emulation flows and scripts using tools such as TCL and Python.
- Collaborate cross-functionally with teams to integrate IP and facilitate pre-silicon software bring-up.
- Enhance transactors and bridges for hybrid co-simulation.
- Engage with EDA vendors to assess new features and facilitate performance enhancements.
- Act as a mentor for junior engineers regarding emulation methodologies.
Required Qualifications
Candidates must possess the following qualifications:
- A degree in Electronics or Computer Engineering.
- Direct experience with major emulation platforms such as Synopsys, Siemens, or Cadence.
- Strong background in RTL, synthesis, and timing.
- Proficiency in debugging tools and waveform analysis.
- Deep understanding of transactor interfaces like AXI and PCIe.
- Experience with programming and scripting languages like C/C++ and Python.
- Knowledge of SystemVerilog testbenches and SoC boot flows.
- Exceptional problem-solving capabilities and teamwork skills.
Education Requirements
A degree in Electronics, Computer Engineering, or a related field is required for this position.