Staff Digital Design Engineer

Job Title

Staff Digital Design Engineer

Role Summary

The Staff Digital Design Engineer leads complex ASIC digital-design projects and provides system-level architecture and technical leadership within the Digital Business Unit. You will translate customer and system requirements into synthesizable RTL and drive implementations across domains such as AI datacenter power control, memory-test, industrial automation, and consumer/health products.

The role guides methodology improvements, coordinates cross-functional execution from architecture through signoff, and leads small technical teams.

Experience Level

Senior level - typically 8–12 years of relevant digital design and ASIC development experience.

Responsibilities

Main responsibilities include system architecture, RTL development, implementation signoff, and technical leadership:

• Define and develop system-level architectures and microarchitectures for complex digital ASIC designs.
• Design synthesizable SystemVerilog RTL for arithmetic DSP, algorithm accelerators, serial interfaces, and processor-subsystem memory and bus controllers.
• Lead design simulation, debug, integration, and technical reviews.
• Define constraints and drive synthesis, static timing analysis (STA), lint, CDC, and other front-end implementation and signoff flows using industry CAD tools.
• Partner with physical-design teams to provide implementation guidance and monitor IC layout progress through timing and closure.
• Collaborate with system, firmware, and API engineers to convert customer specifications into verifiable design requirements and HW–SW debug strategies.
• Drive methodology improvements and propagate best practices across projects.
• Influence product direction and technical roadmaps through tradeoff analysis and engineering judgment.
• Mentor engineers and lead small technical teams from architecture through implementation and signoff.

Requirements

Must-have technical skills and experience; preferred items listed as nice-to-have.

• ASIC and RTL design: Deep experience designing complex digital logic for ASICs, including synthesizable SystemVerilog RTL.
• System architecture: Expert ability to define, partition, and implement complex digital system architectures and microarchitectures.
• Design and signoff flows: Hands-on experience with simulation and debug, synthesis, static timing analysis, constraints, lint, and CDC flows.
• Technical leadership: Proven ability to set technical direction, lead design reviews, resolve complex issues, and guide engineering teams.
• Multi-domain expertise: Strong knowledge across digital design, integration, and hardware–software interaction.
• Methodology expertise: Experience improving quality, efficiency, reuse, and predictability in digital design flows.
• Cross-functional collaboration: Strong verbal and written communication; ability to work with system, verification, physical-design, firmware, and product teams.
• Travel: Willingness to travel up to ~10% as required.
• Nice-to-have: Demonstrated end-to-end delivery through physical-design collaboration; familiarity with using AI tools for coding and scripting.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field is listed; Master's or PhD is preferred. The posting notes typically 8–12 years of relevant digital/ASIC design experience.

About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.