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Staff Digital Design Engineer

Innatera
Full-time
Remote
Worldwide
Level - Senior

Role Overview

Innatera is seeking a Staff Digital Design Engineer to architect, design, and implement digital IP blocks and subsystems for neuromorphic SoCs. This remote position requires a highly skilled professional capable of translating product requirements into RTL specifications while collaborating closely with verification and backend engineers.

Experience Level

Ideal candidates will possess over 6 years of hands-on ASIC digital design experience, managing complex IPs throughout their lifecycle. A strong technical background in front-end design processes, including Verilog/SystemVerilog, is essential for success in this role.

Main Duties

Your responsibilities will include:

  • Architecting and implementing digital IP blocks for SoCs.
  • Translating high-level requirements into RTL-level specifications.
  • Owning front-end design activities, such as RTL coding and simulation.
  • Collaborating with verification and backend engineers to ensure design intent is met.
  • Defining and optimizing PPA goals across various IPs.
  • Developing design flows and automation scripts (Python/shell scripting).
  • Applying low-power design techniques for SoC integration.
  • Mentoring junior engineers and participating in code reviews.

Essential Qualifications

To be successful in this role, you should have:

  • 6+ years of ASIC digital design experience.
  • Strong expertise in Verilog/SystemVerilog RTL development.
  • Proficiency in synthesis and static timing analysis (STA).
  • Experience with Cadence tools and EDA flows.
  • Solid understanding of SoC architecture and integration flows.
  • Proficiency in Python and shell scripting for automation.
  • Excellent documentation skills.
  • Strong problem-solving and analytical abilities.

Education Requirements

A degree in Electrical Engineering, Computer Engineering, or a related field is typically required for this position, though equivalent experience may be considered.

Desirable Skills

Additionally, the following skills will be beneficial:

  • Experience with FPGA prototyping.
  • Familiarity with DFT and STA flows.
  • Knowledge of communication protocols like SPI, I2C, or AMBA.
  • Exposure to C/C++ for integration code.
  • Prior mentoring or coaching experience.