Role Summary
We are looking for a motivated and innovative Staff Design Engineer to develop innovative IPs and technologies for next-generation SoCs. This role involves solving complex design challenges, collaborating across teams, and influencing future architectures.
Experience Level
Level - Senior
Responsibilities
- Develop SoCs/IPs that are power and area efficient.
- Writing Micro-architecture specifications, developing the RTL, and running various design checks.
- Work with Architects to refine and translate architecture specifications into detailed design specs.
- Collaborate with verification teams on test plan reviews and debug activities.
- Improve and evolve design methodologies, flows, and guidelines.
- Mentor and support other team members to ensure successful project execution.
Requirements
- 8+ years of experience in the development of high-quality IP and technology components for advanced SoCs.
- In-depth understanding across all elements contributing to the products’ successful delivery.
- Experience with RTL design for complex ASIC products & SoCs using Verilog and/or System Verilog.
- Expertise in low-power and high-speed design techniques and knowledge in Arm-based designs and/or Arm System Architectures.
- Experience with static design checks, synthesis and timing analysis, and power management techniques.
- Experience with Power domain and Clock Domain Crossing implementation.
- Good understanding of fundamentals of computer architecture and practical experience working on Processor based system designs.
- Technical leadership, mentoring or coaching experience.
- Experience writing design and micro-architecture specifications. Hands-on RTL development expertise.
- Proficiency with scripting (Perl, Python, etc.).
Education Requirements
Typically requires a Bachelor’s degree in Engineering, preferably in Electrical or Computer Engineering, or equivalent experience.