Staff Analog Design Engineer

Role Summary

This position involves intricate tasks in analog IC design, focusing on multi-Gbps SERDES architectures. A decade of hands-on experience in high-performance circuit design and a thorough understanding of FinFET and advanced process nodes are critical for success.

Experience Level

Level - Senior

Responsibilities

• Review SerDes standards to create novel transceiver architectures and detailed sub-block specifications.
• Investigate and develop circuit solutions that enhance performance in power, area, and speed.
• Collaborate with analog and digital design teams to optimize design and verification processes.
• Guide physical layout to minimize parasitics and ensure robust silicon performance.
• Present and review simulation data with internal teams and external stakeholders.
• Document design features, test plans, and results; consult on electrical characterization and analysis.
• Analyze customer silicon data to propose design improvements for post-silicon updates.

Requirements

• MTech/MS with 4+ years or BTech/BS with 5+ years in practical analog IC design.
• Expertise with FinFET technologies and CMOS tape-outs.
• Understanding of high-speed designs (PAM4, NRZ) and SERDES architectures.
• Experience with SERDES sub-circuits (TX, RX, adaptive equalizers, PLL, DLL, BGR, regulators, oscillators, ADC/DAC).
• Skills in analog/digital co-design and performance optimization.
• Familiarity with ESD protection and design for reliability.
• Proficient with schematic entry, physical layout, design verification tools, and SPICE simulators.
• Experience with scripting (TCL, PERL, MATLAB) for simulation results processing.
• Understanding of budgeting and signal integrity issues.
• Strong analytical and communication skills.

Education Requirements

Master's degree in Electrical/Computer Engineering or a related field is preferred; a bachelor's degree with significant experience is acceptable.