STA Synthesis Lead

Role Overview

The STA Synthesis Lead position is responsible for driving the physical design flow from timing through final sign-off, with a significant emphasis on ensuring the successful implementation of SerDes PHY IPs. The role entails collaborating effectively with cross-functional teams to achieve targets concerning power, performance, and area (PPA).

Job Responsibilities

This role involves the following key responsibilities:

• Leading the development of timing methodologies and establishing SDC constraints to automate special timing checks.
• Conducting static timing analysis setup and sign-off for multi-corner, multi-voltage processes to align with PPA targets, ensuring precise timing arcs for the .lib generation.
• Engaging with RTL, DFT, and IP teams to address physical design challenges that impact testing modes.
• Optimizing clock skew and insertion delay across different operational modes.
• Evaluating clock/reset-domain-crossing issues at the netlisting stage and providing feedback on design adjustments or waivers.
• Implementing power-saving strategies while maintaining performance standards.
• Creating and refining automation scripts in Tcl, Perl, or Python for operational efficiency.
• Mentoring junior engineers and sharing best practices to enhance team development.

Required Experience Level

Applicants should have a minimum of 12 years of professional experience specifically in static timing analysis, constraints generation, synthesis, and physical design, with a focus on high-performance SerDes technologies.

Qualifications

The ideal candidate will demonstrate the following qualifications:

• Expertise in timing analysis, ECOs, and .lib generation related to PHYs.
• Familiarity with tools such as Synopsys ICC2, Primetime, and standard ASIC design flow.
• Proficiency in scripting with Tcl, Python, or Perl.
• Strong leadership and communication skills.
• A proven ability to manage multiple projects in a fast-paced environment.

Education Requirements

A Master’s degree in computer engineering or electrical engineering is required for this position.