Sr Staff SoC Engineer (Backend)

Role Summary

This position is responsible for guiding customers through the tape-out process from Netlist to GDS using Synopsys EDA tools. The focus will be on various aspects of backend design including planning, physical layout design, and verification processes.

Experience Level

The role is targeted at individuals with 5 or more years of experience in physical design implementation, specifically within an IC design context.

Responsibilities

• Assist customers in executing successful tape-outs by utilizing Synopsys tools.
• Engage in design planning, floorplanning, and place & route activities.
• Conduct analysis including parasitic extraction, signal integrity, and verification checks.
• Act as a part of customer's IC design team to enhance project outcomes.
• Organize and manage the delivery of project-related tasks effectively.
• Collaborate with the Synopsys team for successful project execution and suggest tool enhancements.
• Lead technical proposal developments and oversee project life cycles.

Requirements

• Typically requires a BSEE or higher degree.
• Minimum of 5 years in a physical design implementation role.
• Familiarity with Floorplan, Place & Route, DRC/LVS, IR drop, EM, and Signal Integrity.
• Experience with STA, formal verification, and synthesis is advantageous.
• Ability to work effectively in a high-pressure environment.
• Excellent verbal and written communication skills in English.

Education Requirements

BSEE or higher in a relevant field.