Sr. Staff PCIe Design Verification Engineer

Role Summary

AMD is looking for an experienced Design Verification Engineer to verify a leading edge PCIe Controller Design, contributing to next-generation technology in various applications including AI Training, Gaming Consoles, and more.

Experience Level

The position requires a minimum of 10 years of experience in a related field, specifically in the areas of design verification.

Responsibilities

Responsibilities include executing functional verification from test plan to signoff, collaborating with architects, writing and reviewing test plans, verifying high-speed digital designs, and conducting code reviews.

• Work on functional verification execution from test plan to verification signoff.
• Collaborate with architects and designers to understand the IP features.
• Write/Implement/Review Test Plans.
• Verification of critical high speed digital designs using various testing techniques.
• Own aspects of the Verification flow from test planning to coverage convergence.
• Build testbench components and develop libraries applying Object Oriented Programming techniques.
• Provide technical leadership and ensure verification sign-off.

Requirements

Candidates must have extensive experience in the verification of commercially successful IPs and strong mentoring abilities. Proficiency in SystemVerilog, UVM, and object-oriented programming is essential.

• Proven experience in verifying commercially successful IPs, Subsystems, or SoCs.
• Expertise in SystemVerilog and UVM.
• Proficiency in object-oriented programming and scripting languages (Ruby, Python, Perl).
• Strong understanding of PC System Architecture and standard bus/interface protocols.
• Experience with simulation profiling and efficiency improvements.
• Exceptional communication, time management, and presentation skills.

Education Requirements

A Bachelor or Master's degree in Computer Engineering or Electrical Engineering is required.