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Sr. Staff Package Design Engineer — MIS substrate / flip-chip exposed die (Power/GaN experience required)

Renesas
August 17, 2026
Full-time
On-site
Shanghai, China
Other Semiconductor Jobs, Level - Senior

Job Title

Sr. Staff Package Design Engineer — MIS substrate / flip-chip exposed die (Power/GaN experience required)

Role Summary

Senior package design engineer responsible for design, qualification and production ramp of power SiP/modules, wafer-level and flip‑chip packages. Based in Shanghai, supporting consumer, industrial and automotive power applications.

Experience Level

Senior level — requires more than 10 years of relevant package development experience.

Responsibilities

Key responsibilities include:

  • Benchmark, select and qualify materials, processes and assembly subcontractors (OSAT) and contract manufacturers (CM).
  • Develop and run DOE with OSAT/CM to optimize processes, define process specifications, and resolve production issues early.
  • Qualify new packages and processes; collaborate with Product, Reliability, Quality and Operations to address customer issues.
  • Ensure smooth production transfer and monitor ramp-up metrics.
  • Participate in packaging roadmap development and maintain technical expertise in power SiP/modules, wafer-level/flip-chip and panel-level packaging.
  • Establish and maintain package design rules.

Requirements

Must-have skills and experience:

  • Over 10 years of hands-on experience in package development focusing on power SiP/modules, wafer-level and flip-chip packaging.
  • Strong understanding of assembly processes, package qualification methods, SPC and statistical analysis tools.
  • Experience working with OSAT/CM: process development, DOE and production transfer.
  • Proven ability to work cross-functionally with Product, Reliability, Quality, Operations and Marketing.
  • Strong analytical, presentation and interpersonal communication skills.
  • Familiarity with power device packaging and multi-chip module technologies.

Nice-to-have:

  • GaN-related packaging experience.
  • Wire-bonding and multi-chip module technology knowledge.

Education Requirements

Doctorate, Master’s or Bachelor’s degree in Physics, Chemistry, Mechanical, Electrical or Materials Engineering (or closely related technical field). No explicit equivalent-experience language provided in source.


About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.

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Date Posted: 2026-07-08