Sr Staff Digital Engineer
RenesasJob Title
Sr Staff Digital Engineer
Role Summary
Design and architect digital RTL (Verilog) for mixed-signal integrated circuits and lead digital implementation activities across the IC flow. Work within a cross-functional engineering team responsible for device-level and sub-system digital architecture, verification, and production hand-off.
Experience Level
Senior. Hiring target: experienced individual with long-tenured background in ASIC/IC design - source indicates around 12+ years overall experience and substantial ASIC experience (senior-level expectations).
Responsibilities
Key responsibilities include:
- Propose, architect, and implement RTL in Verilog for mixed-signal ICs.
- Apply clocking controls, FSM design, low-power techniques, and high-speed design concepts.
- Participate in and lead design, architecture, and verification reviews.
- Oversee digital backend implementation: synthesis, static timing analysis, and logic equivalence checking.
- Create design, verification, and test documentation and specifications.
- Drive feature proposals, definition, documentation, and implementation across teams.
- Mentor and train junior and new-college engineers.
Requirements
Must-have technical skills and experience:
- Fluent in Verilog RTL coding and ASIC design methodology.
- Experience architecting digital designs and producing device/sub-system specifications.
- Expertise in digital implementation: logical synthesis and DFT insertion.
- Proficiency with static timing analysis and creating P&R constraints.
- Familiarity with formal verification, lint tools, and CDC/RDC checks.
- Knowledge of asynchronous clock domain crossings and synthesis implications of RTL.
- Experience implementing and verifying ECOs on RTL, synthesized, and post-route netlists.
- Ability to develop design constraints for synthesis, STA, and P&R hand-off; experience with gate-level simulation and timing violation analysis.
Nice-to-have:
- Experience with ATPG generation and ATE support.
- Background in DFT or physical design.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. The posting references senior-level experience (noting ~12+ years overall experience) alongside extensive ASIC/IC design experience.
About the Company
Company: Renesas
Headquarters: Hitachinaka, Japan
Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.
