Sr Staff ASIC (IC) Engineer

Role Summary

The role involves defining, developing, and delivering high-quality, manufacturable IC layouts using industry-standard technologies and tools in a layout organization focused on Analog and Mixed-Signal ICs for Power Management applications.

Experience Level

Senior level, with 8+ years of experience in Analog and Mixed-Signal IC layout design.

Responsibilities

As a Sr Staff ASIC Engineer, you will be responsible for:

• Implementing physical layouts for Custom & Industrial Power Business Line products at IP, block, and/or SoC level.
• Driving and delivering floorplanning activities for blocks and top-level designs.
• Participating in power supply strategy definition and signal distribution between blocks.
• Delivering analog and mixed-signal layout blocks and contributing to top-level floorplan strategy.
• Applying state-of-the-art layout techniques for device matching, parasitic reduction, ESD protection, latch-up prevention, and yield optimization.
• Executing and signing off physical verification flows, including DRC, LVS, ERC, DFM, and parasitic extraction (PEX).
• Working according to Analog-on-Top and Mixed-Signal-on-Top layout methodologies.
• Attending relevant project and design reviews, reporting progress, risks, and schedule impacts.
• Collaborating closely with design, verification, CAD, and technology teams to minimize rework and resolve physical implementation issues.
• Identifying root causes and proposing solutions for issues observed during first silicon or prototype evaluation.
• Contributing to design-for-quality, ensuring layouts are verified, validated, and suitable for long-term reliability and zero-defect goals.
• Supporting or leading layout team activities, including task planning, execution, and knowledge sharing.
• Participating in and contributing to training activities, technical documentation, and layout guidelines.
• Taking a proactive role in personal development, continuous learning, and methodology improvement.

Requirements

Must-have qualifications include:

• Bachelor’s or Master’s degree in Electrical, Electronics, or Microelectronics Engineering.
• 8+ years of experience in Analog and Mixed-Signal IC layout design.
• Proven experience delivering complex layouts at IP, block, and/or SoC level.
• Strong expertise in analog layout techniques such as floorplanning and parasitic management.
• Hands-on expertise with layout and verification tools, including Cadence Virtuoso and Mentor Graphics Calibre.
• Ability to define and execute advanced floorplan strategies.

Nice-to-have qualifications include experience in automotive or safety-critical semiconductor products, and advanced CMOS BCD technologies.

Education Requirements

Bachelor’s or Master’s degree in Electrical, Electronics, or Microelectronics Engineering.

About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.