Sr Principal Design Engineer

Job Title

Sr Principal Design Engineer

Role Summary

Join the Palladium and Protium solutions team to design and develop low-level device drivers and GUI-based tools used for system configuration, validation, and real-time debugging. The role focuses on software at the hardware-software boundary and requires close collaboration with hardware engineers to enable silicon bring-up and customer-facing tooling.

Experience Level

Senior — 10+ years of industry experience.

Responsibilities

Primary duties include driver development, tooling, integration, and debugging across hardware and software domains.

• Design, develop, and optimize device drivers for high-speed interfaces (e.g., PCIe, CXL) on Linux and/or Windows.
• Architect and maintain GUI tools for device configuration, telemetry monitoring, validation, and debugging.
• Analyze register maps and protocol specifications; translate hardware requirements into robust software implementations.
• Implement device enumeration, configuration handling, interrupt processing, DMA support, and hardware-to-GUI control loops.
• Develop automation frameworks and test utilities to accelerate bring-up and regression testing.
• Triage complex system-level issues spanning hardware and software; perform root-cause analysis and reliability improvements.
• Collaborate with cross-functional engineering and customer enablement teams for product bring-up and field support.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Must-have: Strong production-grade programming skills in C/C++.
• Must-have: Hands-on experience developing device drivers on Linux and/or Windows.
• Must-have: Practical knowledge of high-speed protocols such as PCIe and Ethernet.
• Must-have: Proven ability to debug complex system integration issues across hardware and software.
• Must-have: Experience implementing low-level features: interrupt handling, DMA, device enumeration, and configuration.

• Nice-to-have: Experience with SystemVerilog, Python, Qt/PyQt, Linux kernel driver internals, VFIO/UIO, PCIe BAR mapping.
• Nice-to-have: Familiarity with lab debug equipment (protocol/logic analyzers, oscilloscopes) and applying automation or AI/ML techniques to verification or tooling.
• Nice-to-have: Strong independent problem-solving and project ownership in fast-moving teams.

Education Requirements

Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field. The posting specifies 10+ years of industry experience.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.