Software Engineer II

Job Title

Software Engineer II

Role Summary

Develop Assertion-Based Verification IPs including Verilog models and SystemVerilog assertions for industry-standard bus protocols. Work on formal and simulation-based verification flows to validate RTL designs.

Member of a verification team delivering reusable IP and verification collateral; coordinate with cross-geographic teams and use automation to increase productivity.

Experience Level

Mid-level. The posting expects roughly 2+ years of RTL design/verification experience for candidates with a BE/BTech; master's-level candidates with internship experience are considered.

Responsibilities

Primary day-to-day responsibilities for this role include:

• Implement Verilog design models and write SystemVerilog assertions for protocol compliance.
• Develop and maintain assertion-based verification IP and related test plans and coverage.
• Author automation and flows using scripting languages (Python, TCL) to support verification and regression.
• Debug RTL and verification failures using EDA tools; isolate root causes and propose fixes.
• Collaborate with design and verification teams across locations as an individual contributor.
• Apply verification methodology and create reproducible verification environments and tests.

Requirements

Required skills and experience. Education requirements are listed separately below.

• Hands-on RTL design and verification experience; strong RTL design and synthesis concepts.
• Proven debugging ability and analytical problem-solving to prioritize critical issues.
• Strong verification fundamentals: reading specs, creating test plans, and adding coverage.
• Practical experience with at least one industry standard protocol (e.g., AHB, AXI, CHI, PCIe).
• Experience with scripting and automation (Python, TCL) and flow development.
• Familiarity with EDA tools for debug and verification; ability to use tools to isolate design/verification problems.
• Good written and verbal communication; ability to work across functions and geographies.
• Nice-to-have: formal verification experience and exposure to AI tools or methodologies for verification/automation.

Education Requirements

Degree: BE/BTech or ME/MS/MTech in Electrical/Electronics. The posting indicates 2+ years of RTL design/verification experience for BE/BTech candidates; master's candidates with relevant internship experience are also considered.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.