SoC Verification Engineer

Job Title

SoC Verification Engineer

Role Summary

Work on subsystem and IP verification within the Subsystem Verification Team (IPA group) in Ho Chi Minh City, District 7. Build SystemVerilog/UVM testbenches and verification plans for high-speed interface IP used in AI, 5G, HPC, and automotive systems.

Primary mission: detect silicon bugs before tapeout by developing robust test environments, driving coverage closure, and collaborating with RTL designers and global verification teams.

Experience Level

Entry to Mid-level - 0–4 years of hands-on design verification experience in the semiconductor industry.

Responsibilities

Key responsibilities include:

• Define block and subsystem verification plans mapped to design specifications and protocol requirements.
• Develop UVM testbenches in SystemVerilog, including agents, scoreboards, coverage models, and assertion monitors.
• Write constrained-random and directed tests to exercise protocol compliance, corner cases, and error-injection scenarios.
• Debug RTL and testbench failures using simulators and waveform analysis to root cause and resolve issues.
• Collaborate with RTL designers and global verification engineers to align on design intent and coverage goals.
• Apply formal verification techniques where appropriate to prove properties and close coverage gaps.
• Drive verification closure by tracking coverage metrics and iterating on test plans until signoff.

Requirements

Must-have and preferred skills:

• Must-have: 0–4 years of hands-on design verification experience in the semiconductor industry.
• Must-have: Proficiency in SystemVerilog and UVM for building testbenches and implementing coverage.
• Must-have: Knowledge of at least one protocol such as AMBA, PCI Express, Ethernet, HBM, DDR, CXL, or UCIe.
• Must-have: Experience with industry-standard simulators (VCS, Xcelium, Questa) and version control systems.
• Must-have: Scripting skills for automation and regression management (Python, Perl, or Tcl).
• Preferred: Experience applying formal verification techniques and closing coverage gaps.
• Preferred: Prior IP or subsystem verification and development of reusable testbenches.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.