SoC Product Architect, Memory Ecosystem

Job Title

SoC Product Architect, Memory Ecosystem

Role Summary

The SoC Product Architect, Memory Ecosystem drives NVIDIA's external memory strategy across DRAM and non-volatile flash. This role engages major memory vendors, aligns their roadmaps with NVIDIA SoC and platform requirements, and co‑innovates solutions to meet future bandwidth, latency, power, and cost goals.

Reporting to the SoC Product Architecture team, you will collaborate with architects, memory controller designers, board/system teams, sourcing, and operations to define memory-related platform decisions.

Experience Level

Senior-level. Requires approximately 18+ years of relevant experience in DRAM/memory subsystem architecture, SoC or memory controller design, or closely related roles.

Responsibilities

Key responsibilities include vendor engagement, technical leadership, and cross-functional coordination:

• Partner with major memory vendors to review and align technology and product roadmaps (DDR/LPDDR, GDDR, HBM, NAND, emerging NVM).
• Define and communicate NVIDIA's performance, power, capacity, form-factor, and reliability requirements to steer vendor roadmaps.
• Co-develop and prototype novel DRAM and packaging solutions (signaling, packaging, power-management) to meet future SoC requirements.
• Co-optimize SoC and memory subsystem architecture with architects, memory controller and PHY designers, and system teams (channel topologies, speed grades, rank/stack configurations, error management).
• Represent NVIDIA in vendor technical reviews and roadmap meetings; present data-driven needs and drive decisions and follow-ups.
• Work with sourcing, operations, substrate/PCB design, and quality to incorporate supply, cost, and reliability considerations into long-term memory choices.

Requirements

Must-have technical experience and capabilities:

• 18+ years of experience in DRAM/memory subsystem architecture, SoC or memory controller design, or equivalent roles in semiconductor or system companies.
• Deep knowledge of modern DRAM technologies (DDR, LPDDR, GDDR, HBM) and non-volatile memories (NAND, managed NAND/SSD), including tradeoffs in bandwidth, latency, power, capacity, packaging, and reliability.
• Proven experience working directly with memory vendors on product definition, bring-up, or co-development and influencing vendor roadmaps.
• Strong background in memory subsystems: memory controllers, PHYs, signal integrity, power delivery, and system-level performance/power impact.
• Experience with competitive analysis, teardown interpretation, benchmarking memory bandwidth/latency, and producing actionable architectural recommendations.
• Excellent communication and presentation skills; ability to drive alignment across functions and regions without direct authority.

Nice-to-have:

• Direct experience defining/architecting HBM, GDDR, or high-speed LPDDR solutions for GPUs, AI accelerators, or high-performance SoCs.
• Hands-on experience with advanced packaging (2.5D/3D, CoWoS, multi-chip modules) for high-bandwidth memory interfaces.
• Prior ownership of memory-focused teardown or benchmarking programs and established relationships with major memory vendors.

Education Requirements

MS in Electrical Engineering, Computer Engineering, Physics, or a related technical field, or equivalent practical experience.

About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.