Role Summary
The SoC/IP Verification Lead will be responsible for planning, building, and executing the verification processes for both new and existing features of graphics processor IP. Achieving a bug-free final design is a primary objective in this role.
Experience Level
This position is suitable for candidates with over 8 years of design verification experience, preferably within leading technology companies. Experience with complex processor architectures and team collaboration across multiple sites is essential.
Key Responsibilities
- Develop and maintain functional verification tests at the SOC level.
- Construct testbench components for next-generation IP.
- Enhance and maintain current verification libraries for SOC/Full-chip level verification.
- Provide technical support and guidance to other engineering teams.
- Assist the Hardware emulation team with porting RTL designs onto Palladium/Zebu or HAPS/Protium platforms.
Requirements
- Familiarity with verification methodologies such as OVM, UVM, or VMM.
- Proficiency in Verilog and general logic design concepts.
- Understanding of system-level architecture, including buses like AXI/AHB, memory controllers (DDR4/DDR5), and interfaces such as USB, PCIe, and Ethernet.
- Knowledge of cryptographic algorithms (e.g., AES, RSA, SHA) is advantageous.
- Strong UNIX knowledge and experience with scripting languages like Perl or Python.
- Proficient in using standard design tools (VCS, NCSIM/XCELIUM, Verdi, QUESTASIM) and UNIX revision control tools (ICM, CVS, Perforce) as well as bug tracking tools like JIRA.
- Exceptional communication and presentation skills with the ability to work effectively in cross-functional teams.
- Experience in verifying multimillion gate designs from specifications to tape-out.
- Familiarity with processors and boot flow is beneficial.
- Basic knowledge of software development flows, including assembly and C, is a plus.
Education Requirements
Candidate must hold a BS/MS in Electrical Engineering, Computer Engineering, or Computer Science.