SoC Formal Verification Engineer

Role Summary

The SoC Formal Verification Engineer will be responsible for planning, building, and executing the verification processes of AMD’s graphics processor intellectual property (IP). This includes ensuring the absence of bugs in both new and existing features.

Experience Level

This position requires a seasoned professional with 7+ years of experience in computer engineering or electrical engineering.

Key Responsibilities

• Collaborate with architects, hardware engineers, and firmware engineers to verify new features.
• Develop UVM-based verification environments and test benches, while automating various processes and flows.
• Employ AI tools and models to improve the efficiency of the SV/UVM test suite for effective coverage closure.
• Implement formal verification techniques at the SoC level.
• Conduct UPF power-aware verification for the SoC.
• Verify industry-standard cryptographic and security algorithms such as AES, RSA, SHA.
• Perform functional verification of SoC-level interconnects and NoC architecture design.
• Verify SoC performance on data paths including bandwidth and latencies.
• Debug test failures and work with RTL and firmware engineers to address design defects.
• Design and implement verification tests aimed at achieving functional and code coverage metrics closure.
• Test compliance with standards for high-speed bus protocols, including PCIe and USB.

Requirements

Proficiency in developing UVM-based test benches, familiarity with Verilog, System Verilog, and C is essential. Experience in formal verification techniques at the SoC level is preferred.

Education Requirements

A Bachelor’s or Master’s degree in Computer Engineering or Electrical Engineering is required. Candidates should possess at least 7 years of relevant experience.