SOC Engineer (Synthesis/Timing)

Role Summary

The SOC Engineer will focus on synthesis and timing analysis of system-on-chip (SoC) designs. This role requires collaboration with design engineers to understand design specifications, transform them into valid hardware designs, and ensure optimal performance through effective synthesis and timing closure strategies.

Experience Level

This position is geared toward individuals at the senior level with an established background in hardware design and verification.

Responsibilities

• Perform synthesis and timing analysis for SoC designs.
• Collaborate with cross-functional teams to ensure design specifications are met.
• Debug and resolve synthesis and timing issues as they arise.
• Contribute to the development of design methodologies and best practices.
• Document and present technical findings and recommendations to the team.

Requirements

• Proven experience in digital design and verification.
• Strong background in ASIC/SoC synthesis and timing analysis tools.
• Understanding of RTL coding and verification concepts.
• Excellent problem-solving and teamwork skills.
• Ability to work in a fast-paced environment with tight deadlines.

Education Requirements

A Bachelor's or advanced degree in Electrical Engineering, Computer Science, or a related field is required.