SoC Design Verification Engineer – Data Center Solutions

Job Title

SoC Design Verification Engineer – Data Center Solutions

Role Summary

Join the Data Center SoC Verification team to verify next-generation SoCs that target AI, high-performance computing, and cloud infrastructure. You will work with architects, design engineers, software teams, and verification specialists to develop scalable verification solutions and drive verification to signoff.

Work areas include multi-core CPUs, cache coherency, memory subsystems, AI/ML accelerators, high-speed interconnects, security, RAS, and power-management features.

Experience Level

Mid-level. The role requests a minimum of ~2+ years of design verification experience; senior-level roles may be offered to candidates with proven, advanced expertise.

Responsibilities

The primary responsibilities include planning, implementing, and executing verification for complex SoC designs.

• Develop and execute verification plans for SoC, subsystem, and IP features.
• Design and implement scalable SystemVerilog/UVM and processor-based verification environments.
• Create directed and constrained-random tests, assertions, functional coverage, and checkers.
• Debug RTL, testbench, and integration issues and collaborate with design teams to resolve defects.
• Drive coverage closure using functional and code coverage metrics.
• Participate in architecture and design reviews to incorporate verification requirements early.
• Verify complex features: multi-core CPUs, cache coherency/interconnect fabrics, DDR/HBM memory, PCIe/CXL/Ethernet, security, RAS, and power-management.
• Support emulation and acceleration-based verification and post-silicon bring-up as needed.
• Contribute to methodology improvements, automation, reusable components, and AI-assisted verification flows.

Requirements

Required technical skills and practical verification experience. Education requirements are listed separately below.

• Must-have: 2+ years of design verification experience, with experience taking verification environments from architecture/specification through signoff.
• Must-have: Strong in SystemVerilog, UVM, C, and Assertion-Based Verification (SVA); coverage-driven and system-level use-case verification.
• Must-have: Solid understanding of computer architecture and digital design fundamentals; strong RTL and system-level debugging skills.
• Must-have: Experience verifying SoC-level integration issues and driving verification closure.
• Nice-to-have: Experience with CPU verification, cache coherency protocols (ACE, CHI, CXL), DDR/HBM, PCIe/Ethernet, AI/ML accelerator verification, security/RAS, system performance or power verification.
• Nice-to-have: Familiarity with Portable Stimulus (PSS), Formal Verification, emulation platforms (Veloce/Palladium/ZeBu), power-aware verification, ATE/post-silicon bring-up.
• Nice-to-have: Proficiency in Python or similar scripting languages and experience with AI-assisted verification tools.

Education Requirements

Qualification options specified by the employer: Bachelor's degree in Science/Engineering (including Electrical Engineering, Computer Engineering, Computer Science, or related technical field) with 2+ years of ASIC design/verification/validation/integration experience; OR Master's degree in a related field with 1+ year of relevant experience; OR a PhD in Science, Engineering, or a related field.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.