SOC Design Engineer

Role Summary

The SOC Design Engineer position focuses on developing logic design and register transfer level (RTL) coding for AI System on Chips (SoCs). The role requires integration of compute IP blocks and involvement in architecture and microarchitecture definitions to enhance semiconductor technology.

Experience Level

This position is suited for experienced hires, requiring a minimum of 8 years in relevant fields such as Verilog/SystemVerilog and energy-efficient logic design.

Responsibilities

• Develop logic design, RTL coding, and simulation for AI SoCs.
• Integrate compute IP blocks and assist in defining architecture and microarchitecture features.
• Conduct static design quality checks including lint, CDC, and RDC.
• Optimize logic to meet power, performance, area, and timing criteria.
• Review verification plans, ensuring correct feature verification and resolving RTL test issues.

Requirements

Candidates should have strong analytical skills, effective communication abilities, and be adaptable in a fast-paced environment. Teamwork and collaboration are essential.

Education Requirements

At least a bachelor's degree in electrical engineering or a related field is typically required for this role.