Silicon Design Engineer (Design Verification)

Role Overview

This position is for a Silicon Design Engineer specializing in Design Verification within the NBIO (North Bridge IO) team, focusing on delivering high-performance interconnect IP subsystems for products at AMD. The candidate will partake in key verification efforts across various subsystems including gaming and server applications.

Position Summary

The main responsibility of this role is to lead verification activities for multi-subsystem interoperability and performance within the MPME team. The ideal candidate will work collaboratively with global engineering teams and drive improvements in the development process to ensure excellent product delivery.

Experience Requirements

Candidates are expected to have a significant level of experience: a Master's degree in Electrical Engineering (MSEE) with at least 8 years of relevant experience, or a Bachelor's degree in Electrical Engineering (BSEE) with around 10 years of experience in ASIC/SOC design verification.

Key Responsibilities

• Lead project execution and track progress with the MPME team.
• Assist in the porting or creation of digital verification (DV) environments, including the design of test plans and conduct of coverage analysis.
• Provide mentorship and technical guidance to junior engineers.
• Continuously seek improvements in verification processes.

Required Skills

• Expertise in SystemVerilog, UVM, C/C++, and Verilog.
• Solid understanding of hardware verification methodologies, including coverage-based verification with hardware assertions.
• Familiarity with scripting languages such as Perl, Python, or Ruby.
• Previous experience with PCIE and UPF is advantageous.
• Strong communication skills in English for technical discussions.

Education Requirements

Preferred candidates will hold an MSEE with at least 8 years of experience or a BSEE with 10 years of experience in digital ASIC/SOC design verification.