SerDes Circuit Design Engineer

Job Title

SerDes Circuit Design Engineer

Role Summary

Responsible for defining, designing, and optimizing high-speed SerDes analog and mixed-signal circuits used in Ethernet and memory interface PHYs. The role delivers circuit implementations that meet targets for power, performance, area, timing, and yield while supporting pre- and post-silicon validation.

This position works with cross-functional teams (architecture, layout, validation) within Intel's Central Engineering Group to drive technical execution and produce robust analog solutions on advanced process nodes.

Experience Level

Senior-level. The posting expects substantial industry experience (typically 9+ years of relevant experience as indicated by the employer).

Responsibilities

Primary responsibilities include circuit design, simulation, validation, and collaboration across disciplines.

• Design, develop, and optimize analog circuits for high-performance, high-speed SerDes transmitters, receivers, clocking circuits, and PLLs.
• Create circuit layouts, floor plans, and perform circuit-level simulations and behavioral modeling to validate designs.
• Evaluate and optimize trade-offs across power, performance, area, timing, and yield.
• Collaborate with architecture, layout, and validation teams to ensure functional and electrical robustness.
• Support silicon bring-up, lab measurements, and debug pre- and post-silicon issues at circuit and system level.
• Participate in design reviews, technical discussions, and development of design methodologies and best practices.
• Mentor and guide junior engineers to develop team capability and productivity.

Requirements

Must-have and preferred technical skills and experience.

• Must-have: Significant hands-on experience in high-speed SerDes design and technical leadership in SerDes projects.
• Must-have: Strong fundamentals in CMOS analog design, RC circuits, and high-speed circuit design principles.
• Must-have: Proficiency designing transmitters, receivers, clocking circuits, and PLLs.
• Must-have: Experience with industry analog/mixed-signal tools such as HSPICE and MATLAB; experience with FinFET CMOS process technologies.
• Must-have: Proven ability to debug and validate circuits during silicon and system-level testing; familiarity with high-speed communication standards such as Ethernet.
• Preferred / Nice-to-have: Experience with 224G+ SerDes architectures and development; in-depth knowledge of equalization techniques, channel modeling, and transmitter/receiver optimization.
• Preferred / Nice-to-have: Exposure to next-generation standards and architectures and demonstrated ability to lead cross-functional design decisions.

Education Requirements

Minimum: Bachelor’s degree in Electrical Engineering, Electronics Engineering, or a related technical field (advertised with 9+ years of experience for this role). Preferred: Master’s degree (advertised with 7+ years of experience) or Ph.D. (advertised with 5+ years of experience) in Electrical Engineering, Electronics Engineering, or related disciplines. The posting does not list specific certifications or explicitly state an "equivalent experience" clause.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.