Role Overview
The Senior Verification Design Engineer at AMD is tasked with planning, building, and executing the verification of new and existing features for graphics processor IP. The primary goal is to ensure that the final design is free of bugs.
Position Summary
The ideal candidate will have a passion for complex processor architecture, digital design, and verification. They should be capable of working collaboratively with engineers across various locations and demonstrate strong analytical skills and a proactive approach to problem-solving.
Professional Experience Level
This position requires Mid-Career professionals with significant experience in verification processes and complex system design.
Key Responsibilities
- Collaborate with architects and engineers to understand new features.
- Create test plan documentation covering all feature interactions.
- Estimate time required for new feature tests and necessary test environment changes.
- Build and execute both directed and random verification tests.
- Debug test failures and partner with RTL and firmware engineers to address design defects.
- Analyze functional and code coverage metrics; adjust tests to meet coverage requirements.
Required Skills and Qualifications
- Extensive experience in IP level ASIC verification.
- Proficiency in debugging firmware and RTL code using simulation tools.
- Knowledge of UVM testbenches and familiarity with Linux and Windows environments.
- Proficient in Verilog, System Verilog, C, and C++ programming.
- Understanding of graphics pipeline and multimedia solutions.
- Experience in scripting languages such as Perl, Ruby, and shell.
Education Requirements
Bachelor’s or Master’s degree in Computer Engineering or Electrical Engineering.