Senior Staff Physical Design Engineer

Job Title

Senior Staff Physical Design Engineer

Role Summary

Lattice Semiconductor is seeking a Senior Staff Physical Design Engineer to join the hardware design team focused on IP design and full chip integration. This role involves leading the RTL to GDSII flow for complex design and collaborating with various teams to ensure robust design implementation.

Experience Level

Senior level with a minimum of 12 years of experience in physical design activities.

Responsibilities

The responsibilities of this position include:

• Lead physical design aspects including place & route, CTS, routing, floorplanning, powerplanning, timing and physical signoff.
• Drive efficiency and quality of physical design flow and methodology.
• Conduct physical design signoff checks including timing closure, EM/RV and physical verification (DRC, LVS).
• Collaborate with RTL, DFT, verification and full chip teams.
• Mentor and provide best practices to team members.
• Occasional travel as needed.

Requirements

Essential skills and qualifications for this role include:

• BS/MS/PhD in Electronics Engineering, Electrical Engineering, Computer Science or equivalent.
• 12+ years of experience with ASIC block and full chip physical design activities.
• Experience with multiple tapeouts.
• Familiarity with physical design tools such as Innovus, Genus, Tempus, Voltus, Calibre, Conformal, etc.
• Excellent problem-solving skills and ability to work independently.
• Experience in scripting languages like Perl/Python.

Education Requirements

BS, MS, or PhD in Electronics Engineering, Electrical Engineering, Computer Science or a related field is required.

About the Company

Company: Lattice Semiconductor

Headquarters: Portland, Oregon, USA

Lattice Semiconductor specializes in low power, small-form-factor programmable logic devices and solutions. The company is known for its innovative technology that enables a wide range of applications, including communication, consumer, and industrial markets.