Senior Staff Package Design Engineer - MIS substrate / Flip-Chip exposed die (Power/GaN)
RenesasJob Title
Senior Staff Package Design Engineer - MIS substrate / Flip-Chip exposed die (Power/GaN)
Role Summary
Lead development and qualification of advanced package designs for power SiP/modules, wafer‑level and flip‑chip packaging with an emphasis on production transfer and supplier qualification.
Work across Product, Reliability, Quality and Operations teams and with OSATs/CMs to establish package design rules, optimize assembly processes, and ensure production meets quality and reliability targets.
Experience Level
Senior-level. The role requires more than 10 years of relevant experience in package development, particularly for power SiP/module, wafer‑level and flip‑chip packaging.
Responsibilities
Accountable for package design, supplier qualification, process optimization and production ramp for power and related device packaging.
- Benchmark, select and qualify materials, processes and assembly subcontractors (OSAT) or contract manufacturers (CM).
- Collaborate with OSAT/CM to run DOE, optimize processes, establish process specifications and resolve early production issues.
- Qualify new packages and processes with Product and Reliability teams and address internal/external quality complaints.
- Ensure smooth transition into mass production and implement ramp‑up monitoring.
- Develop and maintain package design rules and packaging roadmaps focused on power SiP/modules, wafer‑level, flip‑chip interconnects and panel‑level packaging.
- Perform process qualification, statistical process control (SPC) and reliability validation for consumer, industrial and automotive power applications.
Requirements
Must-have technical skills and experience for successful performance in this role.
- >10 years experience in package development focused on power SiP/module, wafer‑level and flip‑chip packaging.
- Deep understanding of assembly processes, qualification methods, SPC and statistical analysis tools.
- Experience working with OSATs/CMs, running DOE and resolving process issues during ramp to production.
- Ability to define and maintain package design rules and execute packaging roadmaps.
- Strong interpersonal, communication, analytical and presentation skills for cross‑functional collaboration.
- Nice-to-have: experience with wire‑bonding, multi‑chip module technologies and GaN‑related packaging.
Education Requirements
Doctorate, Master’s or Bachelor’s degree in Physics, Chemistry, Mechanical, Electrical or Materials Engineering (degrees explicitly listed in the source).
About the Company
Company: Renesas
Headquarters: Hitachinaka, Japan
Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.
